New ContributorI am connecting VCCIO of some FPGA bank to 3.3 V for interfacing FPGA with ADC and DAC, Can anyone tell me what I/O standard should I give in .QSF for Differential inputs and outputs in Cyclone V FPGA.
Frequent Contributor
New ContributorFPGA device I am using is CycloneV 5CSXFC6F31.
ADC and DAC used is AD9653 and AD9783 respectively.
Frequent ContributorFor the ADC, the LVDS standard used is 1.8V LVDS, for this the FPGA interface should also match the same LVDS standrad and the IO Bank should be set as 1.8V LVDS.
For the DAC, the LVDS input range is from 800mV to 1600mV, so setting the FPGA interface for the DAC to 1.8V LVDS should work fine for this device too .
New Contributorok thanks.
Can I give "LVDS" as I/O standard for the fpga banks connected to 3.3 V power supply.
Frequent ContributorNew ContributorHi,
Actually what I want to know is If I am using I/O standard LVDS for DAC interfaced FPGA bank, does it supply 3.3V or 2.5V to DAC?
Thanks in Advance,
Frequent Contributorsorry for very late response , It is depends on the what is your VCCIO bank supply where it is DAC channel is connected .
Thank you ,
Regards,
Sree
