Altera_ForumHonored Contributor17 years agoWarning message while design compile Does anyone know how to get rid of the following message? warning (10542): vhdl variable declaration warning at altera_europa_support_lib.vhd(340): used initial value expression for varia...Show More
Altera_ForumHonored Contributor17 years ago --- Quote Start --- I wouldn't care as long as things work and keep managers off my shoulder. --- Quote End --- i enjoyed this post. :D
Recent DiscussionsEP4CGX22CF19C8N Failure Short D8 to C8Cold Temperature IssueNeed Part EOL status(Active/Obsolete/Discontinued/NRND)About floating voltage of the Agilex 3 power on resetThermal Resistance for 10M16SCU324A7G