Altera_Forum
Honored Contributor
11 years agovxWorks and Cyclone V SoC HPS->FPGA bridge
Hello,
I am very new with vxWorks and Altera. I normally work with QNX and Xilinx. I have tuned a vxworks image. I have test some tasks in RTP and DKM modes. Fron DKM I can read from physical memory without problem, but when I try to read from the HPS->FPGA(lw) bridge I get an exception from the operating System. The HPS->FPGA bridge that I am using is mapped at 0xFF200000 and I have some peripheral at 0xFF210000 and 0xFF220000. I have checked these peripheral with Linux and it works well (I can read and write). My boot sequence is Preloader -> u-boot(Configure the fpga and bridges) -> bootrom -> vxWorks and for Linux Preloader -> u-boot(Configure the fpga and bridges) -> Linux Have you ever tried to read something from the FPGA with vxWorks? Maybe the problem is that the initialization of vxworks (bootrom) does something and change the configuration of the HPS->FPGA bridge. In my task I check that the clock to the bridge is enable, the bridge is out of reset, and the FPGA is configured I have some output connected to the peripherals. I have checked that in the configuration of the MMU in the file "config.h" of the BSP exist a mapped range from 0xFF000000 to 0xFFFF0000 and my devices are inside this range. Thanks a lot in advance. I am getting crazy because I cannot find any documentation about vxWorks. I think that is better if I publish this problem in the vxWorks forum, but for now I only have 30 days trial license and I cannot access to vxWorks support (I think). Thanks, Jonathan.