Voltage level problem on a pin which is a clock

hi std_logic_vector

thanks for information

The problem on my prototype is taht i can't compile again,

for rerouting the pcb, i have to wait three weeks for a new one

nevertheless, i verify the same clock on my dev board where the communication works well, the same clock (on a VREF pin too) has exactly the same caracteristic, so i begin to get crazy whith this problem

someone told me about the schematics around the PHY chip^, i'll work on this way today

thanks again for help

hinanotabu86