VIP Suite Design Example
I am trying to implement the VIP Design Example "https://www.intel.com/content/www/us/en/programmable/products/reference-designs/all-reference-designs/broadcast/ref-post-processing.html"
I have a DE2-115 board and I have one composite input (PAL configuration). My output is 640x480 VGA. I managed to work with CVO II core and its works fine, after that I connected 3 TPG and "1 composite input path" to Mixer II core.Each TPG at 320x240 and I scaled the composite video to 320x240 as well.
1-My Frame Buffer and Deinterlacer cores use SDRAM as external memory.Is that a problem ?
2-My composite input is not stable,I can see there is a real capture but its flickering too much. When I checked "CVI.is_valid_resolution()" ,I got false as return value.Why is that happen ?
My Composite Video path
CVI II(8 bits,2 color planes,Sequence,Any field first,Embedded in video,Interlaced,720 288 288 , 1024 FIFO size) => CLIPPER II (RECTANGLE 720 240 ,3 Top offset) => Color Plane Sequencer II(8 2 1 sequence, 8 2 1 parallel) => Chorama Resampler II (Horizontal NEAREST NEIGHBOUR , Vertical NEAREST NEIGHBOUR,Enable 4:2:2 Input, Enable 4:4:4 Output)=>Color Space Converter II (Input bits per color space 8,Output bits per color space
Any would be appreciated