Video IP Cusom ST Block SOP, EOP

I have written the control packet extraction and control packet insertion logic. It's not that bad. About 100 lines of code for each one.

The startofpacket signal occurs coincident with the packet type identifier. The endofpacket signal occurs coincident with the last byte of the control packet (the deinterlacing field I believe).

Also you can look at an example of how Altera did theirs. When you compile a design that has the "Clocked Video Input" and "Clocked Video Output" cores, the source code for those cores can be seen in your project's "db" directory. Look at the file "alt_vip_IS2Vid.v" file in the "db" directory. This is the code for the "Clocked Video Input" block. Somewhere down in there is the code they're using to insert the control packets.

Jake