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Altera_Forum
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15 years ago

VHDL String Compare and FPGA Family Determination

Is there a VHDL string compare function included in the tool, and if so what library must be included? I'm trying to generate different code depending on which Altera FPGA I'm targeting. Perhaps al...
Altera_Forum's avatar
Altera_Forum
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15 years ago

Thank you, that is pretty much exactly what I was looking for. I was a bit confused because in our Xilinx projects here they seem to use some libary function equalsIgnoreCase and I didn't know if I would have to do the same. For me ignoring case isn't that important.