Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- what is the best way to prevent this from happening? Synchronize the async. inputs feeded into the FSM ? --- Quote End --- Yes, that's the required method, as already mentioned. In those cases, where a safe timing can't be guaranteed, e.g because the clock input may have glitches, the safe state machine option prevents freezing. See the Quartus software handbook for details. I was just aware, that my previous statement about default initialization of integers has been incorrect. As Tricky said, integers are initialized to the leftmost value of the range, also in Quartus synthesis. Thus to or downto definition makes an important difference.