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integers get value '0' at power on in RTL simulation, while it gets unknown value in real chip.
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Uninitialized integers get assigned the value -2^(N-1), where N is the number of bits in the integer. (At least under VHDL).
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This is why I want to get rid of all INTEGERs so that I can have a consistently simulation between RTL and GATE. I can capture all my bugs in RTL simulation only.
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I could have sworn one of the first things you're supposed to learn when writing HDL, is to never use integers. That is why there are signed and unsigned types ... of course, that kind of advice does not help when you inherit code ...
Cheers,
Dave
Honored Contributor
