Forum Discussion

Kris4's avatar
Kris4
Icon for New Contributor rankNew Contributor
3 years ago
Solved

VHDL Counter

Hi, I'm trying to make an automatic 7-bit up and down counter. I want it to be in a loop. Let' say it counts from zero to 128, then back to zero, and so on . Is it possible to make a counter that ...
  • RichardT_altera's avatar
    RichardT_altera
    3 years ago

    Not a fan of schematic design, I always recommend users to use verilog or VHDL to design their project.

    Anyhow, you might need to alter a bit of the vhdl template by removing the min_count and max_count. And define the range in the vhdl design.

    So that when you convert it into the bdf, it will shown as q[7..0] instead of q[mincount...maxcount]. I guess bdf only recognize it when it is in number.

    Took some time to figure it out and attached here a working design with range 40 to 140 so you can check it out.

    Best Regards,

    Richard Tan

    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

I believe I have provided the necessary information/answer to your inquiries, I will now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Thank you.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.