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Altera_Forum
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15 years ago

Vhdl code for IP_IRQ component!

Hi, I need help for Vhdl code for designing one IP component, small device drivers and test demonstration that give a periodic interrupt to sierra every second. "SEE ATTACHMENT" Com...
Altera_Forum's avatar
Altera_Forum
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15 years ago

a couple of things:

dont use std_logic_unsigned/signed/arith at the same time as ieee.numeric_std. I recommend using numeric_std.

you cant compare a std_logic vector to a integer literal, you have to compare it to a string. For a hex string you need to write x"5e7". A std_logic_vector is NOT an integer, its a collection of bits.