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Altera_Forum
Honored Contributor
Honored ContributorVerilog and System Verilog
I came across that System Verilog is extension of Verilog. Does it mean that Verilog is going to replaced by System Verilog for design since all the original features of Verilog is supported by Syst...
Altera_ForumHonored Contributor
Honored ContributorGood joke!
According to my knowledge, C++ is a lexical superset of C that leads to a different method of programming: object-oriented versus procedural. While for some applications object-orientation is the best approach it is not for other applications. So, especially for embedded systems, most developers still use procedural programming, thus C. And I guess they also will use C in the future. The same applies to SystemVerilog. It is a lexical superset for an object-oriented approach on a more abstract level. It will be used for system verification before design but, to my opinion, Verilog-2001 will be the standard for FPGA design for a longer time.
