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Altera_Forum's avatar
Altera_Forum
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16 years ago

Verify failed between address 0x2000000 and 0x200FFFF

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

Pausing target processor: OK

Initializing CPU cache (if present)

OK

Downloading 02000000 ( 0%)

Downloading 02010000 (60%)

Downloading 06008020 (99%)

Downloaded 107KB in 1.8s (59.4KB/s)

Verifying 02000000 ( 0%)

Verify failed between address 0x2000000 and 0x200FFFF

Leaving target processor paused

if anybody have an idea about the problem,please answer me

Thanks,

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    this can be due to a lot of reasons.

    if you use sdram f.e. check the phase of the sdram clock.

    have you tried a simple hello world with a minimal system running from internal memories instead of external memory ?
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    this can be due to a lot of reasons.

    if you use sdram f.e. check the phase of the sdram clock.

    have you tried a simple hello world with a minimal system running from internal memories instead of external memory ?

    --- Quote End ---

    Hi,

    I had exactly the same problem. Now I tried building a simple project with the simple "Hello_world" code, using only on-chip memory, which should be enough but I get an error message:

    make -s all includes

    Linking simple.elf...

    /cygdrive/c/altera/91/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: region onchip_memory2_0 is full (simple.elf section .text). Region needs to be 25408 bytes larger.

    /cygdrive/c/altera/91/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: section .rodata [00008020 -> 00008507] overlaps section .exceptions [00008020 -> 000081c7]

    /cygdrive/c/altera/91/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: section .rwdata [00008508 -> 00009f33] overlaps section .text [000081c8 -> 0001333f]

    /cygdrive/c/altera/91/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: section .bss [00009f34 -> 0000a147] overlaps section .text [000081c8 -> 0001333f]

    collect2: ld returned 1 exit status

    make: *** [simple.elf] Error 1

    Build completed in 18.734 seconds

    What is the problem? I'm using a Cyclone III board of version 7.2 while using Quartus 9.1. Could that be the problem?

  • Altera_Forum's avatar
    Altera_Forum
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    Memory is too small...

    Region needs to be 25408 bytes larger.

    printf/scanf, etc. are quite large.
  • Altera_Forum's avatar
    Altera_Forum
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    I had the same problem.

    I was using DE2 board, and the problem was with sdram pins. I had to change manually DRAM_BA pins and DRAM_DQM pins. After that fix, the proyect works properly.
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    I had the same problem.

    I was using DE2 board, and the problem was with sdram pins. I had to change manually DRAM_BA pins and DRAM_DQM pins. After that fix, the proyect works properly.

    --- Quote End ---

    hi, may i know what do you mean by changing the pins? i dont understand. i am having the same problem with sdram.
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    hi, may i know what do you mean by changing the pins? i dont understand. i am having the same problem with sdram.

    --- Quote End ---

    Hi.

    You need change in Pin Planner:

    DRAM_LDQM to DRAM_DQM[0]

    DRAM_UDQM to DRAM_DQM[1]

    and

    DRAM_BA_0 to DRAM_BA[0]

    DRAM_BA_1 to DRAM_BA[1]

    And then, you can assign these pins to your Nios II as buses.

    DRAM_DQM[1..0]

    DRAM_BA[1..0]

    You must do this because Nios II in SOPC Builder 9.1 SP2 has buses for these connections to the SDRAM

    I hope to be clear enough :)