Forum Discussion
Altera_Forum
Honored Contributor
9 years agoBelieve me it is very easy to integrate the sdram controller in your design, by QSYS, and compile. I don't talk about simulation because I did not simulate the sdram controller.
I remember I created one new QSYS project and included it in a project (custom cyclone fpga board which included SDRAM) and made the project running in less than one hour, including writing the Nios C code that tested the SDRAM. Assume you have the SDRAM controller for simulation, do you a model for the SDRAM itself? I mean having the SDRAM controller in the simulation without the SDRAM model is useless. For simulation, I recommend that you start with a simple QSYS project which includes one on-chip memory and one custom master Memory Mapped block. Or a simple QSYS project which includes one NIOS processor and and on-chip memory and GPIO peripheral to make yourself familiar with everything QSYS.