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Altera_Forum's avatar
Altera_Forum
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11 years ago

Using Altera GPIO Lite Ip core as bidirectional DDR

Hi, I have a signal whose data rate is 480Mbps. it is a DDR signal. I would like to know whether by using GPIO Ip i can acheive this ?. What would be the IO standard for the ddr output of GPIO...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Yes, that sounds reasonable.

Yes, the GPIO IP will allow you to generate a DDR signal you can drive to a pad. The same IP supports bidirectional ports as well.

You can use 1.2V LVCMOS as the I/O standard, although that's not very common. As the tools will tell you a 1.2V I/O standard may have lower performance than I/O standards at higher voltages.

Finally, as I frequently state on this forum - put a simple design together, constrain it and run it through Quartus. Quartus will answer all the questions you've asked.

Cheers,

Alex