The tap controller is the JTAG slave side. The master has to control TCK, TMS and TDI respectively read TDO. Personally, I would use a FTDI chip, that can generate JTAG signals at 6 MHz TCK without additional hardware, FTDI also supplies a JTAG library for high level programming.
Regarding the JTAG protocol implementation, you can consult an Altera application note or other web resources. How to
supply data in jtag format is basically a question of which data you want to send to a device. Vendors of JTAG capable chips ususally supply *.BSDL files (boundary scan desciption language) that describe the particular JTAG resources of the chip. Additional documentation may be provided for programming purposes.