URGENT: Peripheral to Memory DMA Transaction

I have no idea what you're trying to do here...

1. PIO -> Avalon-MM

2. DMA -> Avalon-MM

3. SGDMA -> Avalon-ST

Look at this http://www.johnloomis.org/niosii/pio/pio_example1.html

This is a easy way to check your data with your logic design work or not in hardware real-time...

Actually, what you have so far does work from my point of view.

It's good anough to add a DMA.

where does it fail?

I have seen lots of reports in this forum asking why the DMA does not work.

So far I have only seen implementations, where the DMA HAL drivers were completely disabled in the BSP settings, and the DMA registers is programmed directly.

I also find it much more understandable than the HAL drivers.

When transferring data from peripheral to SDRAM using DMA. My code is as followed:

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#include "io.h"# include <stdio.h># include <unistd.h># include <sys/alt_dma.h># include "altera_avalon_pio_regs.h"# include "alt_types.h"# include "system.h"# include "sys/alt_timestamp.h"

static volatile int rx_done = 0;

static void transfer_done (void* handle, void* data)

{

rx_done++;

}

void mem2mem_DMA(unsigned int dst, int length)

{

void *rx_data = (void *) dst;

alt_dma_rxchan rxchan;

int ret_code;

int i;

int x[100];

for(i=0;i<100;i++)

{

IOWR(ADDER_0_BASE,0,1);

/* Create the receive channel */

if ((rxchan = alt_dma_rxchan_open("/dev/dma")) == NULL)

{

printf("Failed to open receive channel\n");

exit (1);

}

ret_code = alt_dma_rxchan_ioctl(rxchan, ALT_DMA_SET_MODE_32, NULL);

if (ret_code)

{

printf("Error: SET_MODE_32: %d.\n", ret_code);

exit(1);

}

ret_code = alt_dma_rxchan_ioctl(rxchan, ALT_DMA_RX_ONLY_ON, (void*)(ADDER_0_BASE));

if (ret_code)

{

printf("Error: ALT_DMA_RX_STREAM_ON: %d.\n", ret_code);

exit(1);

}

/* Post the receive request */

if ((ret_code = alt_dma_rxchan_prepare(rxchan, rx_data, length, transfer_done, NULL)) < 0)

{

printf("Failed to post read request, reason = %i\n", ret_code);

exit (1);

}

}

/* wait for transfer to complete */

while (!rx_done);

printf("Transfer successful!\n\n");

}

int main(void)

{

printf("\nThis is 32bits addition operation \n\n");

unsigned int dst = SDRAM_BASE + 0x600000;

unsigned x[150];

//unsigned long output1[100];

int i=0;

int w;

mem2mem_DMA(dst, 100);

for(i=0; i<100; i++)

{

printf("%d\n",IORD(dst, i));

}

return 0;

}

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--- Quote Start ---

where does it fail?

I have seen lots of reports in this forum asking why the DMA does not work.

So far I have only seen implementations, where the DMA HAL drivers were completely disabled in the BSP settings, and the DMA registers is programmed directly.

I also find it much more understandable than the HAL drivers.

--- Quote End ---

Yes, i experienced it too. but I dont have much tutorial on DMA registers. So i have no idea where to start and how to do it.

My DMA work ok... I'm be able to copy from SDRAM to OnChip... I guess it could be a bug...

Sean

Yes, I had the DMA drivers work in one direction, but not the other.

Whatever I tried, no luck.

Look in the Quartus Handbook DMA chapter (google for altera nios dma).

The registers are explained there.

You have a status register, read and write address, length and some control bits.

you program them like you did with your periereal: IOWR(AVALON_0_BASE,reg,val);

Adresses and length should be obvious.

You only need to select the correct control bits.