Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Unconstrained Path in PFL IP core

Hallo I am making a PFL IP core for a MAX V device. and i wrote a SDC file based on the application note 478,the PFL IP core user guide. which is available on the following link. I used table ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Could you post the output of the Timing analyzer, complete file. It will help in finding out which path is unconstrained.