Forum Discussion

晓郝's avatar
晓郝
Icon for New Contributor rankNew Contributor
7 years ago

Unable to establish a link of RapidIO

When I use RapidIO in Arria 10 to communicate with DSP , I find port_initialized of IP core is high , but the port_ok of the port 0 error and status CSR-offset:0x158 is low. According to RapidIO Gen1 Debug Checklist of INTEL FPGA WiKi , I check the steps of Unable to establish a link , but the issue still exist.

7 Replies

  • Nathan_R_Intel's avatar
    Nathan_R_Intel
    Icon for Contributor rankContributor
    7 years ago
    Hie, Can you help clarify if your design is unable to establish a link although CSR 0x158 = 0 and port_initalized goes HI? Regards, Nathan
    • 晓郝's avatar
      晓郝
      Icon for New Contributor rankNew Contributor
      7 years ago

      Hi,

      When DSP complete the initialization, the port_initialized of FPGA IP core is high, but CSR 0x158 = 1 ,

      the PORT_UNINIT of this register is 1, the PORT_OK of this register is 0 . Besides I find the

      no_sync_indicator is 1. What maybe bring on unable to establish a link.

      Tah

    • ghe001's avatar
      ghe001
      Icon for New Contributor rankNew Contributor
      6 years ago

      楼主，问题解决了没？我也遇到同样的问题，能否共享一下解决办法，谢谢。