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晓郝
New Contributor
New ContributorUnable to establish a link of RapidIO
When I use RapidIO in Arria 10 to communicate with DSP , I find port_initialized of IP core is high , but the port_ok of the port 0 error and status CSR-offset:0x158 is low. According to RapidIO Gen1...
Nathan_R_Intel
Contributor
ContributorHie Tah,
Some of the reasons for cannot establish link is already provided in the Intel FPGA Wiki section below such as link partner does not match core configuration, core in reset, timing no met, incorrect analogue settings etc.
https://fpgawiki.intel.com/wiki/RapidIO_Gen1_Debug_Checklist#Unable_to_establish_a_link
Hence, please check the other checklist questions related to link cannot establish.
Regards,
Nathan
