Altera_Forum
Honored Contributor
13 years agoUnable to configure a slave Stratix in PS mode from an EPCS64
I have a system consisting of a Cyclone IV GX and a Stratix of the first generation (EP1S25B672C6). The configuration device as an EPCS64. The GX is the master of the configuration chain, with the MSEL bits set for "active serial". The Stratix is the slave device and set to passive serial.
The EPCS is loaded with both configurations files from the JTAG, using the indirect addressing scheme. The .JIC programming file is prepared in the normal manner with the Quartus `Convert Programming Files" utility, using the two .SOF files to build the .JIC file. The programming shows no error. But when booting, the CONF_DONE stays low. All the programming signals are very clean, and the nCEO to NCE line between the GX and the Stratix behaves normally. The nSTATUS line stays high during the booting programming cycle. But when the EPCS reaches the end of the programming data and stops sending clocks and data, it seems that the STRATIX is still waiting for more to come, and it does not release the CONF_DONE line. NOTE: The Stratix and GX configures with no problem from the JTAG. Can anyone help?