At first thanks for your cooperation !!!
I have a great labor to modify\adapt the ref design 3c120 to my EVM NEEK 3c20 , the hw is very different between the first and second EVM .
All the project is wrote under verilog language and I do not know that syntax I know only vhdl language .
So my inquiry is :
1_Do you have some project in vhdl code and no verilog is very very complicated to change that one ? .
2_about software folder where are located the c files ? I see 2 folder : one bsp\bsp_patches (what mean *.c.patch) another app folder ....
I do not below that it is easy to send udp package from my EVM , I look up it is very complicated or no ??
Tx again ,
Shush