Honored ContributorHi i am trying to impliment the UART serial port megacore,
Has anyone got an example bdf of this in use so I can see what inputs and outputs are needed, or can someone tell me what inputs and outputs are need? Also am I correct in thinking that a driver is needed on the pc to read the data from the serial port, how do i do this? Thank you in advance for your help.
Honored ContributorCan you tell, which uart serial port megacore you're referring to? I'm aware of a JTAG UART from the university program IP, but don't regard it as UART serial port, rather a virtual JTAG function.
Honored Contributorhi, yes it is the one from the IP program.
I am new to altera and need to store my results from the board to my pc. I thought using the serial port would be the easiest way to do this? Is this correct and how do I do it? Thank youHonored ContributorSo you want to use the altera_up_avalon_rs232 core without a NIOS II processor as a serial interface to your HDL design?
Honored ContributorYea that is what I was going to do. As I got the card doing some analysis and need to save the results on the pc.
But I think I going to add a nios core now as I think will be easier to do this in c rather than vdhl. I started looking at adding a nios core today and doesn't look too hard. But some direction for the UART would be great. ThanksHonored ContributorThe said UART is mainly designed or usage with NIOS, as the Avalon interface indicates. In this enviroment, it should operate similar to an UART of at typical hardware processor.
Using this (or any other UART component) with a pure HDL design is a bit more difficult. It typically implies a state machine that waits for transmission of a character before the next one is scheduled, or a command interpreter connected to RxD.
