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EEren
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Two clock domains in the same procces

The module clock is CLK = 120 Mhz. The milliseconds counter clock is MS_CLK = 100 Mhz. I count milliseconds constant TICKS_FOR_1MS : std_logic_vector(31 downto 0) := X"000186A0"; --100 Mhz pr...