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Altera_Forum's avatar
Altera_Forum
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16 years ago

trying to constrain external clock driver (TQ), searching help

Hello, as the title already reveals, I am trying to constrain my external hardware in the TimeQuest. After my "sysclk_out" in in my design there is a clock driver on my board, that I would like...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks, for your replies. I was unsure about this, because to my external sdram I have got this clock driver in the clock circuit path on my circuit board, but there is no component in my data circuit path. So I expected, that I must tell the TimeQuest in any way, that the path in relation is delayed. If you now say, that there is no added delay for the clock output, I will just ignore the driver and not constrain the path.

Thanks.