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Altera_Forum
Honored Contributor
Honored Contributortrying to constrain external clock driver (TQ), searching help
Hello, as the title already reveals, I am trying to constrain my external hardware in the TimeQuest. After my "sysclk_out" in in my design there is a clock driver on my board, that I would like...
Altera_ForumHonored Contributor
Honored ContributorThe CDCVF2505PW is a PLL-based clock driver, as such it adds no delay to your clock output signal and you don't have to take any provision for it. You can see it as a virtual device which adds zero delay.
