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Altera_Forum
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14 years ago

Triple Speed Ethernet (TSE) Performance

Hi, we are currently developing a system for a data logger. we are using Cyclone III FPGA to log the data from various sensors and store it on a memory. we are also using 10Mbps Ethernet to dow...
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Altera_Forum
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14 years ago

The first optimization to do is to compile the project with -O3. You'll see a big increase. Then the next one is to use dedicated on board memory for the packet data, as described in an440 (http://www.altera.com/literature/an/an440.pdf). Of course you would need a FPGA with enough on board memory.

As Josyb says the next step to get more performance is to use hardware to generate the packets, but it's a bit more complicated to set up and is limited to UDP.