Transceiver Rate Match FIFO - Why is it needed?

I think you'll find that PLL do adjust their frequency to match that of the incoming signal.

The 'skip' codes probably allow you to run most of your logic at a fixed frequency, and only the line receiver at the frequency of the incoming signal.

The 'skip' code would then be added/deleted before the rx fifo.

Plausibly they could also be added when the tx side would otherwise underrun.

PCIe may well require that you transmit with your own clock, not one recovered from the receive signal - one end has to do that anyway, and symmetry is useful.

You also (probably) want to be able to transmit when rhe rx signal is absent.