Forum Discussion

Omer1's avatar
Omer1
Icon for New Contributor rankNew Contributor
1 day ago

Timing Slacks inside Altera IP

Hi, I am compiling my design for the device 10AX115N2F40I2SG using: Quartus Version: 22.1std.2 (Build 922, 07/20/2023, Standard Edition) I am encountering timing violations (negative slack) on the...
Core Logic
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
1 day ago

Are there any warnings or issues shown for the EMIF IP since this appears to be referring to one of the IOPLLs for the EMIF in an I/O bank?  What is your refclk for the IP and what speed do you have the EMIF running at (internal and external)?