Timing Simulation with Altera-Modelsim

Hello thepancake, thank you for the reply.

After many trials I was able to start simulation, and this was slower than normal, so I thought I was right. But the behaviour was the same of functional simulation, and I know that it can't be, because timing simulation in Quartus told me a wrong timing behaviour, different from the functional.

I must be wrong.

I understand your advice. So have I to write a new testbench for gate level netlist? The vho has the same declaration of my top-level entity, except for generic constants' declaration....

Or maybe I have to do a new library, where I put only my new testbench and the vho instead of the top-level entity file???

Because when I compile vho, it puts a new architecture to my top-level entity, which now has 2 architectures...maybe I am wrong here!