Forum Discussion
Community ManagerTerasic Apollo S10 SOM_FA
I bought the Terasic P16E-FMCP to use on my Terasic Apollo S10 SOM board for PCI Express 3.0 implimentation. However after testing the included program, it did not work, so I emailed Terasic Support and they told me it was only tested on Intel CPU and it appears never tested on AMD. So they made me run a simple program called System Information Viewer from rh-software.com which tested the information sent and received from the PCI endpoint and it appears there are errors stimming back from the demo program does not natively run on AMD processors. So for the past 6 months, Terasic has been dragging there feet on this issue, telling me they will work on a solution but I must go out and purchase another computer by Intel, then run several versions of Quartus Pro, starting from 19.1, through 23.3, I must download them individually.
I told them I am not doing this, I am not being paid to test out your code, I simply purchased the board direct from you for $650, and NOWHERE on the website does it publish it works only with Intel CPU. Instead they are pointing the fingers at me saying I'm delayin a resolution on this issue by not testing out there code, I told them that IS YOUR JOB! I AM NOT EMPLOYED BY TERASIC!
Terasic is a partner program of Intel, they have all the means to reach out and contract a device driver writer and solve this incompatiblity issue. This is beyond my expertise. They simply won't do it.
Does anyone have a solution to this problem? Why are they passing the buck at me?
2 Replies
paramProdThat's a genuinely frustrating situation, and your position is completely reasonable — you purchased a product and expect it to work as advertised.
Let me give you some technical clarity here, which may help you push back more effectively.
**The hardware itself is CPU-agnostic**
The Apollo S10 SOM is built around a Stratix 10 SX FPGA "Apollo S10 SoM" , and PCI Express is a well-defined industry standard. The FPGA's PCIe hard IP operates as a PCIe endpoint — it communicates with the host over a standardized link. At the hardware protocol level, the FPGA endpoint has no knowledge of, or dependency on, whether the host CPU is from AMD or Intel. The PCIe link negotiation, TLP transactions, and enumeration are all governed by the PCIe spec, not the CPU vendor.
**The real issue: the demo software/driver**
What *is* CPU-vendor-dependent is the **host-side software** — specifically the kernel driver and any user-space demo application. If the demo application or BSP driver was only validated against Intel platforms, it may contain assumptions (e.g., about memory-mapped I/O, DMA coherency, IOMMU behavior, or CPU-specific intrinsics) that break on AMD systems. That's a Terasic software defect, not something you caused or need to diagnose.
**Your position is correct**
Terasic's request that you purchase an Intel-based PC and iterate across multiple Quartus Prime versions — from 19.1 through 23.3 — to reproduce their own test environment is not a reasonable ask for a paying customer. You bought a finished product, not a development contract.
**Practical suggestions going forward:**- Ask Terasic specifically and in writing: "Is AMD CPU support for the P16E-FMCP PCIe demo a documented limitation of this product?" If it is not documented as a limitation, that is a product defect they are obligated to address.
- Ask them to provide a minimal host-side test that exercises only raw PCIe enumeration (e.g., confirming the device appears in
lspcior Device Manager on your AMD system), to isolate whether the issue is at the driver level or the demo application level. - If you are on Linux, checking whether the endpoint enumerates correctly via
lspciis a quick, tool-independent sanity check — correct enumeration means the PCIe link itself is functional and the problem is squarely in the demo software.
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