Stratix V Hard IP for PCI Express (Root-point)

Dear Sir,

I am developing a product that uses the Altera FPGA (Stratix-V).

I am designing FPGA logic using Hard IP for PCI Express.

I assign the two PCI Express port in FPGA.

One port is assigned Native Endpoint, and other one port is assigned Root-point.

I have experience with the Endpoint, but I don't have experience with the Root-point.

So, I have some question.

1.On page 8-48 of "Stratix V Hard IP for PCI Express User Guide(May 2013)" have the following description.

"In Root Port mode, do not access the Configuration Space using TLPs and the LMI bus simultaneously."

Can I do? Configuration how without using the LMI?

2.Please tell me an example of setting the configuration space at the root-point.

3.When I use the Root-point on Hard IP, do I need any special settings compared to Native Endpoint?

Could you advice to me from these situations?

Best Regards,

kahaluu