Stratix IV GX transceivers: 32-bit word alignment in basic mode?

Hi,

I'm using the following alignment pattern:

0x0000BC1C

BC and 1C are both 8/10b control bytes.

In the megafunction, I'm using the following settings:

-Basic mode

-32 bits

-8/10 endoding (obviously)

-Manual word alignment mode (assert the rx_enapatternalign when you know the RX is receiving the alignment pattern)

-Word alignment pattern is 20 bits

-Word alignment pattern: 01011111000010111100 (= 0x5F0BC)

Note: The alignment pattern is entered in the megafunction in its 10/8 encoded form, so 0xBC1C becomes 0x5F0BC.

-In addition, I use a byte ordering block (based on the syncstatus signal of the word aligner) that triggers on the last 1C of 0xBC1C.

As this 1C will be encoded as a control word, I entered 000000000 100011100 as byte ordering pattern where 00011100 is 0x1C and the preceding b'1 is the control_detect flag bit.

So, to summarize, I put 0x0000BC1C on the 32-bit TX user data bus where the 0xBC1C portion is 10/8 encoded as control bytes (assert tx_ctrlenable to do this) and transmitted as 0x5F0BC. The RX side word aligns to this (when rx_enapatternalign is asserted) pattern and performs byte ordering using the last 0x1C. The I put my user data on the parallel TX bus and it shows up correctly on the RX side.

p.s. - I assume the transceiver is initialized properly; that the analog and digital resets are released in the correct order and based on the pll_locked and rx_freqlocked outputs etc., as described in the handbook)