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Let me break this into two parts. I've used three methods for remotely updating FPGAs in the past:
1 - Use a configuration PROM which can be loaded via JTAG. This implies you have some JTAG controller in your remote system. Also, these PROM devices are not very large so really the don't accomodate Stratix III. This is passive serial or passive parallel mode.
2 - Use a CPLD in conjunction with a flash device. The CPLD handles reconfiguration of the FPGA (reads data from flash and programs FPGA). The FPGA is only responsible for requesting a reconfig from the CPLD. This mode is passive serial or passive parallel.
3 - Use a serial flash device and operate under Active Serial mode. This requires the FPGA itself to trigger and manage configurations. The only mechanism for doing this is with the Remote Update Controller as you stated.
To answer your question ... yes the remote update controller is easy enough to interface to that you could write some simple verilog or VHDL code to control it.
Now here is the second part:
How are you going to download a new FPGA image into the flash? This has nothing to do with the remote update controller. You need some way to write to the flash device. You have to answer this question no matter what configuration scheme you choose. I have done it three ways:
a - Wrote a verilog parallel flash controller to write data into the flash. The data was transferred to the board via USB. In this situation we were using a CPLD to program the FPGA from the flash in passive parallel mode.
b - Used a NIOS processor to write data into the parallel flash. Again using a CPLD to configure the FPGA. Here we transferred new configuration to the data via Ethernet.
c - Used a NIOS processor to write data into the EPCS serial flash device. Here we used Active Serial configuration mode in conjunction with the remote update controller. I've used both USB and Ethernet to transfer configuration data to the board under this scheme.
In SoPC builder, Altera provides an EPCS controller peripheral that can be used to interface to the flash. Now for everything I've done with it, I've used the NIOS processor. But you wouldn't have to. You could certainly write a little controller to manipulate that EPCS peripheral to program your data into the flash and not use a NIOS at all. Also, Altera provides the ALTASMI_PARALLEL megafunction for programming the EPCS device. Those are the two directions I would point you in.
http://www.altera.com/literature/ug/mfug_asmi.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=altasmi_parallel You can certainly do everything you need to do without a NIOS. Now when it comes to the NIOS, I'm a big proponent. You'll never get so much use out of so few logic resources as you will out of an embedded processor. I believe the price tag on the NIOS is $500.00. However, I'd just twist your sales rep's arm until he gives it to you for free.
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Hi Jake,
As a fellow work collegue of Stephen, I am currently about to implementing the REMOTE_UPDATE in conjunction with the ALTASMI_PARALLEL megafunctions to program the ECPS device in AS mode.
I only need to have a factory and one application image stored on the device.
I plan to write some user logic in the factory image that allows me to load the application image on power-up.
If the application image fails and a reconfig error automatically loads the factory image again, I need to interrogate the reconfig error in factory mode to decide whether to attempt to reload the same application image.
What then happens if the factory image endlessly tries to load the same application image and is stuck in a continous loop reloading itself back to the factory image.
Is it possible for me to create a factory image that :
1/ reads the status reg on power-up
2/ If an reconfig error had occured, increment an "reconfig error count" byte and write it to the General purpose memory area in the ECPS device.
3/ Perform a reconfig of the application image
4/ If this has failed, steps 1-3 will be repeated until I have reached my own hardcoded error count threshold.
5/ When the number of reconfiguration retries have been reached, the factory logic will just sit in factory mode and wait until new application image is loaded by an external host into the ECPS device.
This method involves me reading a byte from the ECPS device every time I am put into factory mode. The byte will store the error count and will bebe incremented every tiem an unsuccessfull reconfig has occured. Since I am not using a NIOS controller, is it still possible for me to access the General Purpose Memory Locations in an ECPS device using the ALTASMI_PARALLEL megafunction?
Many thanks,
Julie
Honored Contributor
