New ContributorStratix 10 GX user io speed
Greetings!
We looking for proper FPGA for our project and we have some general questions about Stratix 10 series.
First of all we are concerned about user io speed. It is stated in device datasheet that maximum achievable speed for single pin is 750MHz for example and noted that speed depends on pin standard. Further it is stated that for software memory controller 1200Mhz achievable. And interesting thing that software memory controller`s signals could be configured on the same pads as for user io signals.
So. Is it true that in some cases user single io pin could achieve 1200Mhz switching frequency? For example, if we use SSTL standard (which is used for memory controller) for FPGA logic input, could we in some cases get 2gbps data rate on that pad?
Hello,
Conditions outside the range listed may cause permanent damage to the device. Additionally, device operation at the absolute maximum ratings for extended periods of time may have adverse effects on the device. Thus, we would advise customer not to design anything out of specs.
Thank you.
