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DaveMM's avatar
DaveMM
Icon for New Contributor rankNew Contributor
7 months ago

Stratix 10 GX Transceiver IO pairs

Is there any way to configure a transceiver p/n pair to be two single ended general purpose IO? We are trying to use the Stratix 10 development kit FMC connector and would like to use the IO in FPGA...
Configuration
Generic Io
Programmable Logic Device
Naji_Naufel_Arrow's avatar
Naji_Naufel_Arrow
Icon for Occasional Contributor rankOccasional Contributor
7 months ago

Hi,

Transceiver pin have a very custom logic structure behind them and not directly accessible by the user.

Can you please reference where in the Dev kit document you see it mentioned?

I see in the FMC section, there is mention of the LVDS pins, can be used as single-ended signals but no mention of the transceivers.