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Honored Contributor
Honored Contributorstore LSB after shift right - vhdl
Hi,
In my project I need to right shift an input vector by one. For example I have A=0101. Then right shift by one I get Q=0010. Now, I want to store the LSB of the input vector in this case is bit '1'. How to do the operation for store the LSB value? There is no problem to write vhdl code for the right shift operation, but I don't know how to write for the store LSB operation :confused:. Can anyone give idea or advice. Many thanks7 Replies
Altera_Forumwith a register?
process(clk) begin if rising_edge(clk) then store <= a(a'low); end if; end process;- Altera_Forum--- Quote Start --- with a register?
--- Quote End --- Hi Tricky, Is it possible if I want to store the LSB value one by one (from different input vector) until reach 4 values. Then the output will be a vector of (3 downto 0). Did you get what I try to explain? Thanksprocess(clk) begin if rising_edge(clk) then store <= a(a'low); end if; end process; - Altera_Forum
then use a counter to change the index on each clock.
- Altera_Forum--- Quote Start --- then use a counter to change the index on each clock. --- Quote End --- Hi Tricky, Can you give example on that? Many thanks
- Altera_Forum
signal cnt : unsigned(1 downto 0) := "00"; process(clk) begin if rising_edge(clk) then store( to_integer(cnt) ) <= A(A'low); cnt <= cnt + 1; end if; end process; - Altera_Forum--- Quote Start ---
--- Quote End --- Hi Tricky, Thanks for give an idea. I will try the code. Many thankssignal cnt : unsigned(1 downto 0) := "00"; process(clk) begin if rising_edge(clk) then store( to_integer(cnt) ) <= A(A'low); cnt <= cnt + 1; end if; end process; - Altera_Forum
Why not just create a wide shift register and tap off it accordingly. For example if i had a 4-bit input and I wanted to right shift and retain the LSB I would create a 5-bit shift register where bits [4:1] represent the result and [0] represents the LSB that was shifted out of the result. If you wanted to do this over and over then just keep shifting and pluck that bit [0] out.
