Forum Discussion
New ContributorStep Load conditions
Hi,
in document 821801, in table 25, the slew rate dI/dt for device 028 is greater than for device 065. Is it correct or an error in document ?
thanks and regards
5 Replies
FvMSuper Contributor
Guess you are referring to table 29 of most recent Agilex 5 PCB Design Guidelines?
ohfpga1Hi, it is for table 29, yes, sorry I wrote table 25 in my question.
Farabi_AlteraRegular Contributor
Hello Olivier,
A5E028B : stepload 2.5A , di/dt 100A/us
A5E065B : stepload 3.5A, di/dt 70A/us
di/dt is determined by how fast the current change, not how big the current step is.
Larger device A5E065B draws more total current, but draw it slower than smaller device A5E028B.
Notes to understand di/dt:
1- These are not linear scalings
2- The numbers came from internal simulation and silicon characterization
Conclusion :
Table 29 information is correct, not mistyped.
regards,
Farabi
- Farabi_Altera
Hello,
I am taking this case. I will reply to your question asap.
regards,
Farabi - ohfpga1
Hi Farabi, thanks a lot for your answer.
