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Honored Contributor
Honored ContributorSPI with DMA is not working?
Hi, everyone I am using SPI Master Core on FPGA to transmit data to SPI slave (offboard device). I want to use DMA to free my NIOS for other tasks during SPI data transfer. My Idea is NIOS...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Avalon MM master : waitrequest Avalon MM slave: dataavailable, endofpacket & readyfordata How can it work? Thanks --- Quote End --- It doesn't. The MM interface hasn't got a waitrequest to hold the DMA off, effectively resulting in a TXOverrun at the second write. The dataavailable and readyfordata are internally connected only and read as 'status' signals by a Nios II CPU. Maybe you can try inverting the readyfordata and use that as a waitrequest.
