sof and pof behaves differently for Max 10

Here are the 2 major modules related.

there is a UART TxRx module "uart_comm", which translate the RS-232 level signal into a byte and valid data.

Then we use the byte and valid data to input it into a frame checker and CRC check checker module "command_ctrl".

when CRC pass, we update a certain register( "read_offset " register in the code) value. otherwise, the value did not get updated.

The issue we observe is that, the register value that we want to update, failed to update.

Please see file attached.

Thanks

Here is another file

Hi,

May I know which resistor value that you would like to update failed? Is it stuck or what is happenning? I just would like to understand if this is related to your state machine design where it is stuck or not.

Hi, John,

what I can observe is that register "read_offset " is not updating.

I am not able to debug more. Since If I simply add a signal tap logic analyzer to debug(not changing any RTL), this problem will disappear. I think due to the POF file got changed with the additional signal tap logic function.

So it is really hard to find out the reason. any netlist change will affect the POF file, and then will make this issue disappear.

my question is, After configuration is done, does the FPGA read back the configuration in the Logic element and compare with the original data in the flash to make sure the configuration is effective?

Hi,

FPGA configuration will include CRC checking to confirm the validity of the image. If the content is corrupted then it will failed configuration

Hi, John,

Per my understanding, the POF in the CFM is the data source, and the LEs are the data destination.

I think the data out put from the CFM is correct, as it passes CRC check. But how do we make sure the data destination recieved it correctly? what if the destination electronic is in a meta-stability state, and the writing of the data to the destination is not successful. Is this possible?

Thanks

Hi,

Once the configuration is complete and CONF_DONE is high then the LE are ready to be function. That is why if you performed reset on your design then you should be able to recover from the issue.