Altera_Forum
Honored Contributor
15 years agoSignaltap
I am trying to debug the signals on a ALTERA Stratix IV chip.
I generated a signaltap using windows and then placed the file in the linux run script using set_global_assignment -name SIGNALTAP_FILE /home/a.stp set_global_assignment -name ENABLE_SIGNALTAP ON set_global_assignment -name USE_SIGNALTAP_FILE a.stp The synthesis run is good . I programmed the chip using the sof file but I cannot see anything in the analyzer. The blue light on the Terasic USB blater is always off and is on only intermittently when I click on "Read Data" or "run analysis" The analyzer shows JTAG communication error when I run the analysis or cannot find instance message. Scan chain shows the device properly. Is the procedure of adding the file using the script shown above is correct?