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Altera_Forum
Honored Contributor
Honored ContributorShifts problem on simulations of design example Cyclone II ALTLVDS (External PLL)
Dear all, I am reading SERDES Transmitter/Receiver (ALTLVDS) Megafunction User Guide. In the Design Example 2: Cyclone II ALTLVDS Using External PLL Option, both functional and timing simulati...
Altera_ForumHonored Contributor
Honored ContributorCould you give us some notes/examples on how to do that so that we can avoid some errors?
Thank you very much! --- Quote Start --- Frank, you're right. There's a lot of trial-and-error involved when using C3 (soft) altlvds_rx, with bit-slipping and phase-shifting, not to mention the problems with the buffer implementation when using an odd deserialization factor. After all I managed to get it working with an aligned reference clock and a mux buffer implementation. Regards, Ton --- Quote End ---
