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Altera_Forum's avatar
Altera_Forum
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17 years ago

SG-DMA data bus configuration

Why the SG-DMA data width can only be configured to (8, 16, 32, 64) bit!?

I want 24-bit data width, so cannot I simply modify the Verilog file of the SG-DMA component to match my requirement? Or there are hidden things that prevent the variety of the DMA data width?

Thanks

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    avalon memory mapped only allows 8, 16, 32, 64, 128, 256, 512, 1024 bus widths. avalon streaming, however, would allow the 24 bit date width you want.

    --dalon