anm
Occasional Contributor
Occasional ContributorSDF generation for Cyclone V on Quartus 19.1 Standard Edition
Hi, I have compiled a design on a Cyclone V FPGA using the Quartus 19.1 Standard Edition. I want to generate an SDF file to perform Post-Place and Route simulation. I have tried all of the Quartus...
Hi,
Simulation using a post-fit timing netlist, testing functional and timing performance is supported only for the Arria® II GX/GZ,Cyclone® IV, MAX® II, MAX V, and Stratix® IV device families.
You may refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qps-tp-simulation.pdf , Table 2, Page 5.
Thanks.
Best regards,
KhaiY
