No. derive_pll_clocks, as the name implies, only works for PLL clock outputs. Is only 1 of the 4 clocks active in the design at a time? If so, you also need a set_clock_groups timing exception because only one of the 4 clocks will be active on the output of the mux at a time. It would look something like:
set_clock_groups -exclusive -group clock_1 -group clock_2 -group clock_3 -group clock_4
If any of the clocks bypass ALTCLKCTRL and are used in the design when a clock from the mux is active, you may need to add additional generated clock commands targeted to the output of the mux and then add set_clock_groups exceptions between them.
Steve