Forum Discussion
lambert_yu
Contributor
Contributorrx simplex of transceiver reset problem
Hi all,
env : one rx simplex transceiver channel on one bank; one tx simplex transceiver channel on another bank;
data pattern : prbs20
fpga & quartus version: 10ax115n2f45i2sg/ quar...
Hi,
Please assert the rx_analog_reset input to the reset controller that resets the RX CDR and RX PMA blocks of the PHY and that puts CDR in lock to ref clock then locked to data mode and then release the analog reset.
Thank you
Kshitij Goel
Kshitij_Intel
Frequent Contributor
Frequent ContributorHi,
Please assert the rx_analog_reset input to the reset controller that resets the RX CDR and RX PMA blocks of the PHY and that puts CDR in lock to ref clock then locked to data mode and then release the analog reset.
Thank you
Kshitij Goel
lambert_yuHi K**bleep**ij,
Thanks for your answer, I have do the things like you said, and this method is okay.
Brs,
Lambert
