Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHello Dave,
that's a reasonable method if a configuration controller is involved, e.g. multiple FPGAs configured from a single flash memory. I'm targetting to "minimal" systems with programmable part comprised of one FPGA and a serial flash. I have the RSU running now with a pof check demanding a specific usercode target field. It turned out that (at least for cyclone III) the RSU controller is reading in the rbf header part, 40 data bytes and a CRC16 or checksum. The usercode is placed in byte offset 8 to 39, bit 0. The RSU controller checks the CRC, so you can enforce a pof error if you don't accept the usercode. Best wishes, Frank