Reset Vector - NIOS

Hi,

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Thank you.

Regards,

Kelly Jialin, GOH

Hi Kelly,

I understand. You may close this ticket for now. I will reopen one if needed in future. Thanks for your support.

Hi MK,

May I know what are the additional comments or clarification needed? Without looking at your code, I am not able to further give comments or support.

Close pending means I will not be able to support your queries after and the community will be there to help you with your further queries.

Thank you.

Regards,

Kelly

Hi Kelly,

Thanks for your clarification. May I know what is the meaning of "setting this case to close pending"?. Does it mean I will have to wait for someone to address or give additional comments?

Hi,

Sorry for misunderstanding. Yes, the NIOS code is stored nowhere and sent over JTAG via debugger.

Hope this clarifies your doubts. I will be setting this case to close pending in the next few days.

Thank you.

Regards,

Kelly

Hi Kelly,

In my scenario, I am using debugger option through JTAG to run NIOS. So as per the discussion so far and understanding, the NIOS code is stored nowhere and hence the reset vector offset should not disrupt or affect the designed system in anyway. So I am not quite convinced with your statement. Am I missing something?

Hi MK,

By changing the reset vector offset changes the location of the reset vector relative to the memory module’s base address and might affect your designed system.

Here is a link for your reference: https://www.intel.com/content/www/us/en/docs/programmable/683836/current/reset-vector.html

I am glad your project is compiled and pinged successfully with the correct base address.

Hope this clarifies your doubts.

Thank you.

Regards,

Kelly

Thank you for clearing my doubts. The overall experiments I did have now boiled down to one final question from my side.

I have a qsys project with NIOS, TSE IP, MSGDMA and other components in the system. The objective of the project is to bring up the TCP/IP stack and perform a ping from host pc to NIOS. Few pointers about the experiment.

1) The reset vector offset was pointed to external flash memory.

2) The FPGA was configured with .sof file. The flash was not programmed with anything from our side. But the NIOS reset vector memory was chosen as flash and reset vector offset was pointed to a location in flash.

3) The NIOS was booted in debug mode from eclipse over JTAG.

4) The Eclipse project is a simple socket server template project from Intel.

The experiment turned out to be successful, but, with the following question that I still could not find a reasonable answer.

Q1) If the reset vector offset is set to be: 0x0000b020 in qsys, we can observe from Eclipse NIOS II console that auto negotiation is established, and ping is happening successfully. But if I just change one single parameter in my entire project, which is the reset vector offset to be let's say: 0x08b00000 , then we can see only that auto negotiation is passed, but ping is not happening. So, what direction would you think next? I understand it's difficult to give an answer without knowing what the code is doing. But I am just looking for a hypothesis, or possible scenarios on what could have caused this. Any inputs are welcome and would give me a new direction :).

Thank you

Hi,

I agree with sstrell's statement:

1)The Nios processor code will be stored in the flash memory pointed by the reset vector offset address

2)Nios processor code starts at 0x08b00000

3)The code is sent over JTAG via the debugger and not stored in any location

Thank you.

Regards,

Kelly

1) Yes.

2) Yes and yes.

3) Nowhere. The code is sent over JTAG via the debugger.

4) No clue without knowing what your code is doing.