Forum Discussion

Rk_Athram's avatar
Rk_Athram
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Reset controller Ip's rx_digitalreset never going to LOW

HI, I am using Reset controller, ATX pll and native phy in my project to use dynamic reconfiguration. I have connected all signals as mentioned in user guide, and created a simulation model. ...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi Rajesh,


As I understand it, you have some inquiries related to the rx_digitalreset behavior. For your information, the rx_digitalreset is dependent on the rx_is_lockedtodata. Only after the CDR achieved lock-to-data mode, the rx_digitalreset will be de-asserted. In your screenshot, it seems like the rx_is_lockedtodata = low.


Please let me know if there is any concern. Thank you.


  • Rk_Athram's avatar
    Rk_Athram
    Icon for Occasional Contributor rankOccasional Contributor
    4 years ago
    Hi @CheePin_C_Intel,

    Thank you for your quick response.
    I have checked my native phy is not generating rx_clkout is always low.
    Tx_clkout is ok.
    If I understand unless CDR locks I will not get rx_clkout signal

    So what is the condition to CDR get locked?
    What points I am missing !what I should consider!