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SnehalB's avatar
SnehalB
Icon for New Contributor rankNew Contributor
3 years ago

Required ECC coding technique , compatible with Intel FPGA ALTECC decoder IP core.

Hi , we are using Cyclone V e FPGA and wanted to use Intel FPGA ALTECC IP core as decoder with input encoded data as 72bits ( 64bit data + 8 Bit parity). we are implementing ALTECC IP at our receiv...
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Hi,

Based on ALTECC Intel FPGA IP description,

The ALTECC megafunction allows you to encoding or decoding input by using Hamming Coding Scheme. Check image:

Hamming code implementation at source device should be not a problem.

Document link: https://www.intel.com/content/www/us/en/docs/programmable/683490/20-3/altecc-encoder-features.html

Best Regards,

Sheng

p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution and give Kudos.